"Beckton" will be the next high performance processor from Intel, based of "Nehalem" and will have a massive 24MiB of L3 cache. The die will be very big since it is still built on 45nm. Intel details how it will keep power in check.
Cramming 24MiB of L3 cache and eight cores where the less complex Core i7 already takes up 263mm2 took a considerable amount of improvements. The die size is still expected to be huge but the average selling price of these processors will make up for the cost of silicon. When it comes to power, with a quad-core already in the 125W mark, something needed to be done and Intel detailed how it achieved a low power L3 cache today.
Intel is using sleep transistors extensively to minimize the leakage power. A shutoff option is available to eliminate the leakage power in disabled portions of the cache.
Also, using fine-grained clock gating allows to reduce dynamic power. "Beckton" can lower the power supply of the SRAM can be as low as 0.36V, which saves approximately 83% of leakage power, yielding good power figures for these new cores.
Top clockspeed is also expected to be lower than the quad-core equivalents but there's no confirmation from Intel about that, yet.
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